About Verisense

Verisense, is an ASIC and FPGA design services company based in Israel. Verisense customers range from the largest ASIC vendors in the world, through many of the top aerospace companies, to early stage startups. Verisense has been involved in developments in the fields of wire-line and wireless communication, Telecommunications, cellular, CPUs, graphic engines, imaging, aeronautical, space, RF, analog and mixed signal. Verisense also has unique expertise in Safety applications development for the Avionics industry (DO-254).

In recent years we expanded our business to serve also the FPGA industry. While we provide our customers all aspects of FPGA development, we have been able to illustrate to many of them the value of using advanced ASIC verification methodologies also in the FPGA world. Using this methodology we can provide complete correct-by-design FPGAs, complete coverage reports, and a virtually effortless and predictable bring-up.

The disciplines and methodologies used in the ASIC world lend themselves well to the Avionics DO-254 process for certifying FPGAs and ASICs for use in airborne systems. For the last few years we have been working with multiple customers on a number of DO-254 FPGA design and verification projects. Having gained in-depth insights into this market and its technological challenges, Verisense has developed a set of solutions including hardware testers for DO-254 FPGA certification. 



Mr. Tzvika Shaked brings over 20 years of comprehensive management experience in operations and complex hardware design projects.

In his current position at Inomize, Tzvika manage Verisense activity and the operations of the Inomize-Verisense group.

Prior to founding Inomize in 2007, Tzvika has co-founded Siano Mobile Silicon, and established the HW development group.

Earlier in his career, Tzvika worked at Modem Art and Motorola Communication.

Tzvika holds B.sc degree from Ben-Gurion University

Tzvika Shaked,
Udi Barel,
VP Engineering

Mr. Udi Barel has 30 years of experience in the semiconductors industry and has proven record in direct and matrix R&D team management, leadership of world-wide, multi-discipline teams to first time success. Udi led the execution of breakthrough projects, multi-cores, high speed, highly integrated SoCs and was responsible for all design aspects, from architecture to physical implementation, including support for production.

Udi began his career at Motorola Semiconductor Israel (now NXP) as a designer of Communication IPs for Motorola Integrated Communication Processors, led the development of many Power Quicc Pro and QorIQ devices (PowerPC based architecture) as well as development of LS2 devices (ARM based architecture). Udi was the site manager of the southern branch of Freescale Israel located in Omer Industrial Park, managing the Netcomm R&D team that was responsible for IP and SoC development, worked closely with customer to align definition to requirements.

 Udi Barel holds EMBA from Tel-Aviv university and BSc. in Electrical Engineering from the Thecnion, Israel

Kochav-Lev, COO

Mrs. Shuli Kochav Lev brings more than a decade of experience in business relationships, human resources, and logistics.  

Shuli has proven abilities in development and preservation of human resources and managing training programs for new engineers. Shuli developed, established, and directly executed operating policies to support overall company policies and objectives.

Shuli helped facilitate the 2017 merge between Inomize and Verisense.

In her last position, Shuli was the HR & Admin Manager of Verisense, had overall responsibility for the contact with customers and suppliers, recruited engineers, increased employee retention and was responsible for revenue and sales growth.

Shuli holds a BA degree, specializing in Human Resources, from Ben-Gurion University of the Negev and an MBA, specializing in Organizational Behavior, from Bar Ilan University.



As the amount and complexity of electronics for airborne applications continues to rise, an increasing number of applications need to comply with the RTCA DO-254/Eurocae ED-80 standard for certification of complex electronic devices such as ASICs or FPGAs. The specification includes five levels of compliance, known as Design Assurance Levels (DAL), that range in severity from A (where hardware failure would result in catastrophic failure of an aircraft) to E (where failure would not affect safety).


A DO-254 compliant design is specified using a set of formal requirements. As part of the certification process, the developer must prove that their implementation meets all of these requirements. The objective of DO-254 is to demonstrate that the development and verification of complex hardware complies with this process. A key principle in a DO-254 flow is that the verification results (simulation waveforms, regression status, coverage data) must be traceable and linked to the formal requirements. The process of traceability may be either automated or manual; the output capabilities of the tools utilized in the flow will determine both the ease and degree of automation.


The Verisense hardware verification platforms focus on ease of use and automation and on ensuring that the verification effort is a predictable, quantifiable and easily repeated.

Verisense Hardware Verification Platforms

Hardware verification is one of the most crucial phases to the DO-254 process since this is where the design is checked vs. the initial formal requirements. As such, an efficient mechanism to link the verification plan and its results back to the original requirements documents is mandatory for demonstrating DO-254 compliance.

However for FPGA and ASICs, this is also the area which is most lacking in verification tools and there is no de-facto industry-wide accepted practice on what is the most appropriate method for hardware verification. It is important to note that DO-254 specifies a process but it does not specify the detailed implementation of the process.

Historically, the most common method for hardware verification was to probe the pins of the FPGA. This is a very time consuming process which is often very complex, not automated, not easily reproducible, and often not really technologically feasible, especially on high speed interfaces.

The Verisense hardware verification tester tool platforms close this gap!

The two most common approaches to hardware verification of FPGAs and ASICs are either dedicated hardware in the loop testers in which you test the FPGA or ASIC in a dedicated system designed specifically for this purpose, or verification of the FPGA/ASIC in the final destination hardware system.

Verisense has developed hardware verification tester tools to address both these approaches. They are already being used to certify customer DAL A and B FPGA designs. We would be happy to discuss your needs and our solutions with you.

It is important to note that the eventual complexity (and cost) of the hardware verification solution can often be substantially reduced by making fairly simple decisions in the definition stage of your product. We strongly suggest that you be in touch with us as early in your development process as possible.

Check out our product brief.

Verisense Service Models

We recognize that for most customers, the DO-254 certification is a necessity which they need to comply with, but it is not a product differentiator. Therefore, many customers would be happy to off-load the hardware verification effort to someone else. Regardless of whether you want to do most of the work yourself, or if you want to off-load the bulk of it to someone else, Verisense has a model that will work for you.

At the most basic level, we can provide you with a hardware verification system. You can prepare and run all your tests on the system and generate the information you need for your certification. Or, If you prefer, we can be much more involved in the process and generate the required tests and then run them on the verification system for you. As needed we can also participate in your DER reviews to discuss the process and results.

An integral part of our business model is to design and verify ASICs and FPGAs, so we would of course be happy to discuss helping you with any design and verification requirements you may have.

Training Program


Verisense is holding a training for new engineers at least once a year. This has been successfully done for the last 10 years. The training plan is composed of about 3-month plan, which takes place at Verisense premises in Jerusalem.

The junior engineers are given frontal lectures, exercises and self-training programs. The company team leaders are accompanying the engineers through this learning process as well as being there for any technical and engineering questions which may arise. They are also helping the junior engineers with solving the exercises.

In addition, the team leaders are providing the engineers lectures on some real use cases which they encounter and other technical data such as introduction to AMBA bus and system design, verification flow and ASIC/FPGA design flow.

Special attention is given also to Linux familiarity and Perl scripting to make the transition to the real world of engineering easier and faster.


Detailed plan of the training is below:

  • Linux introduction

  • Introduction to chip design

  • Verilog- practice & project

  • Perl + project

  • Introduction to FPGAs

  • Self-learning and exercises

  • Design Flow

  • UVM

  • Specman / System Verilog

  • Final project


After that training, the junior engineers are grouped with an experienced engineer (~4-6 years of experience) and that engineer becomes their team leader for several projects thereafter.

Graduate of Electrical Engineering / Computer Science / Physics / Economics or Practical Engineer for a unique training course in the field of hardware development



Inomize-Verisense a chip development company will provide a unique 3-month training course in the field of Design and Verification. Graduates who complete the course successfully and subject to the company's needs at the time will be able to become employees and integrate into a variety of leading and advanced hardware development positions in the high-tech market.

The course will take place at the company's offices in Netanya and will demand availability of 9 hours per day during 5 days per week. The work is suitable for residents of the central and northern regions.

A graduate who successfully completes the course and will work in our company will receive the full amount back after three months of work.



Education: B.Sc. in Electrical Engineering / Computers / Physics / Economics or Practical Engineering. (minimum score 85)

Also suitable for a discharged soldier who is a graduate of a technological unit within the framework of his military service.

Technology-oriented persons that are attracted to hardware development.

With a high level of learning ability and a desire to integrate into one of the hottest fields in the semiconductor industry.

Ability to work in a dynamic work environment.

High-level English.



Jerusalem site - Verisense

8 Hartom St.

POB 45167

Jerusalem 91451

Tel: +972-2-547-5500

General info: info@verisense.com

Sales Department: sales@verisense.com